FPGA Design Engineer
Sii Sp. z o.o.
PL, 50.26008, 19.02547, katowice, śląskie, Katowice, śląskie
jeden dzień temu
... subsystems (ARM CSS), DDR5 memory controllers, PCIe Gen5 interfaces, and advanced ... components, including high-speed memory controllers (DDR5 6), PCIe Gen5 interfaces, ... ARM CSS, DDR4 DDR5 memory controller and PHY design, PCIe Gen5 ...
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