Lead Analog Layout Engineer
Undisclosed Salary
Capgemini Polska
PL, 54.35203, 18.64664, Gdańsk, Trójmiasto, Gdańsk
18 dni temu
... together a global team of engineers, scientists, and architects to help ... . in a timely manner Layout design verification including DRC, LVS, ERC, ANT and extraction Block level floor planning with design and layout engineers Top level integration and sign- ...
www.adzuna.pl